A millisecond-anneal-assisted selective fully silicided (FUSI) gate process

被引：3

作者：

Lin, Da-Wen ^{[1
,2
]}

Wang, Maureen ^{[1
]}

Cheng, Ming-Lung ^{[1
]}

Sheu, Yi-Ming ^{[1
]}

Tarng, Bennet ^{[1
]}

Chu, Che-Min ^{[1
]}

Nieh, Chun-Wen ^{[1
]}

Lo, Chia-Ping ^{[1
]}

Tsai, Wen-Chi ^{[1
]}

Lin, Rachel ^{[1
]}

Wang, Shyh-Wei ^{[1
]}

Cheng, Kuan-Lun ^{[1
]}

Wu, Chii-Ming ^{[1
]}

Lei, Ming-Ta ^{[1
]}

Wu, Chung-Cheng ^{[1
]}

Diaz, Carlos H. ^{[1
]}

Chen, Ming-Jer ^{[2
]}

机构：

[1] Taiwan Semicond Mfg Co Ltd, Hsinchu 300, Taiwan

[2] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu 300, Taiwan

来源：

IEEE ELECTRON DEVICE LETTERS | 2008年 / 29卷 / 09期

关键词：

fully silicided (FUSI); millisecond-anneal (NISA); MOSFET;

D O I：

10.1109/LED.2008.2001850

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We demonstrate, for the first time, an integration-friendly selective PMOSFET fully silicided (FUSI) gate process. In this process, a millisecond-anneal (NISA) technique is utilized for the nickel silicide phase transformation. A highly tensile FUSI gate electrode is created and hence exerts compressive stress in the underlying channel. The highly flexible integration scheme successfully, and exclusively, implements uniform P+ FUSI gates for PMOSFETs while preserving a FUSI-free N+ poly-Si gate for PMOSFETs with the feature size down to 30 run. A 20% improvement in FUSI-gated PMOSFET I-on-I-off is measured, which can be attributed to the enhanced hole mobility and the elimination of P+ poly-gate depletion.

引用

页码：998 / 1000

页数：3

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