Design of Efficient Reversible Binary Subtractors Based on A New Reversible Gate

被引:86
作者
Thapliyal, Himanshu [1 ]
Ranganathan, Nagarajan [1 ]
机构
[1] Univ S Florida, Dept Comp Sci & Engn, Tampa, FL 33620 USA
来源
2009 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI | 2009年
关键词
QUANTUM GATES; LOGIC;
D O I
10.1109/ISVLSI.2009.49
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Reversible logic has extensive applications in quantum computing, low power VLSI design, quantum dot cellular automata and optical computing. While several researchers have investigated the design of reversible logic elements, there is not much work reported on reversible binary subtractors. In this paper, we propose the design of a new reversible gate called TR gate. Further, we investigate the design of reversible binary subtractors based on the proposed TR gate. The proposed TR gate is better for designing reversible binary subtractor compared to such gates discussed in literature in terms of quantum cost, garbage outputs and complexity of gates.
引用
收藏
页码:229 / 234
页数:6
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