共 26 条
[1]
Al-Rabadi A., 2004, REVERSIBLE LOGIC SYN
[2]
[Anonymous], 1980, INT C AUT LANG PROGR
[3]
[Anonymous], 2003, THESIS U NEW BRUNSWI
[4]
[Anonymous], 2005, Proceedings of the 2nd Conference on Computing Frontiers
[5]
[Anonymous], Digital signal processor (DSP) with Linux
[6]
Synthesis of full-adder circuit using reversible logic
[J].
17TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS: DESIGN METHODOLOGIES FOR THE GIGASCALE ERA,
2004,
:757-760
[8]
Efficient adder circuits based on a conservative reversible logic gate
[J].
ISVLSI 2000: IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI - NEW PARADIGMS FOR VLSI SYSTEMS DESIGN,
2002,
:83-88
[9]
CHAVET C, 2007, P ICCAD SAN JOS CA U, P604
[10]
De Vos A, 2005, LECT NOTES COMPUT SC, V3728, P207