Low-Crosstalk Simultaneous 16-Channel x 25 Gb/s Operation of High-Density Silicon Photonics Optical Transceiver

被引：39

作者：

Aoki, Tsuyoshi ^{[1
,2
]}

Sekiguchi, Shigeaki ^{[1
,2
]}

Simoyama, Takasi ^{[1
,2
]}

Tanaka, Shinsuke ^{[1
,2
]}

Nishizawa, Motoyuki ^{[1
,2
]}

Hatori, Nobuaki ^{[1
,2
]}

Sobu, Yohei ^{[1
,2
]}

Sugama, Akio ^{[3
]}

Akiyama, Tomoyuki ^{[1
,2
]}

Hayakawa, Akinori ^{[1
,2
]}

Muranaka, Hidenobu ^{[3
]}

Mori, Toshihiko ^{[1
,2
]}

Chen, Yanfei ^{[4
]}

Jeong, Seok-Hwan ^{[1
,2
]}

Tanaka, Yu ^{[1
,2
]}

Morito, Ken ^{[1
,2
]}

机构：

[1] Photon Elect Technol Res Assoc, Tsukuba, Ibaraki 3058569, Japan

[2] Fujitsu Ltd, Kawasaki, Kanagawa 2110053, Japan

[3] Fujitsu Labs Ltd, Atsugi, Kanagawa 2430197, Japan

[4] Fujitsu Labs Ltd, Kawasaki, Kanagawa 2118588, Japan

来源：

JOURNAL OF LIGHTWAVE TECHNOLOGY | 2018年 / 36卷 / 05期

关键词：

Crosstalk; electric integrated circuit; flip chip bonding; package substrate; penalty; photonic integrated circuit; power integrity; receiver; signal integrity; silicon photonics; transceiver; transmitter;

D O I：

10.1109/JLT.2018.2797167

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We successfully developed a high-density broadband 16-channel x 25 Gb/s on-package silicon photonics optical transceiver. The flip chip bonded bridge structure realized high density of about 363 Gb/s/cm(2). We demonstrated simultaneously on all 16 channels error-free operations with low crosstalk penalties of Tx-to-Tx 1.4 dB, Rx-to-Rx 1.4 dB, and Tx-to-Rx < 0.1 dB.

引用

页码：1262 / 1267

页数：6

共 17 条

[1]

Akiyama T., 2017, P EUR C OPT COMM

[2]

[Anonymous], 2014, CISC VIS NETW IND GL

[3]

Aoki T., 2017, P EUR C OPT COMM

[4]

Aoki T., 2017, P OPT FIB COMM C EXH

[5]

CHEN YY, 2015, P INT C CHEM MAT, V22, P402

[6]

De Dobbelaere P., 2016, P EUR C OPT COMM

[7] Hybrid Silicon Photonic Circuits and Transceiver for 50 Gb/s NRZ Transmission Over Single-Mode Fiber [J].

Denoyer, Gilles ;

Cole, Chris ;

Santipo, Antonio ;

Russo, Riccardo ;

Robinson, Curtis ;

Li, Lionel ;

Zhou, Yuxin ;

Chen, Jianxiao Alan ;

Park, Bryan ;

Boeuf, Frederic ;

Cremer, Sebastien ;

Vulliet, Nathalie .

JOURNAL OF LIGHTWAVE TECHNOLOGY, 2015, 33 (06) :1247-1254

[8] The 12-Core POWER8™ Processor With 7.6 Tb/s IO Bandwidth, Integrated Voltage Regulation, and Resonant Clocking [J].

Fluhr, Eric J. ;

Baumgartner, Steve ;

Boerstler, David ;

Bulzacchelli, John F. ;

Diemoz, Timothy ;

Dreps, Daniel ;

English, George ;

Friedrich, Joshua ;

Gattiker, Anne ;

Gloekler, Tilman ;

Gonzalez, Christopher ;

Hibbeler, Jason D. ;

Jenkins, Keith A. ;

Kim, Yong ;

Muench, Paul ;

Nett, Ryan ;

Paredes, Jose ;

Pille, Juergen ;

Plass, Donald ;

Restle, Phillip ;

Robertazzi, Raphael ;

Shan, David ;

Siljenberg, David ;

Sperling, Michael ;

Stawiasz, Kevin ;

Still, Gregory ;

Toprak-Deniz, Zeynep ;

Warnock, James ;

Wiedemeier, Glen ;

Zyuban, Victor .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2015, 50 (01) :10-23

[9]

Hatori N., 2016, P 6 INT S PHOT EL CO

[10]

Hayakawa A., 2015, P OPT FIB COMM C EXH

← 1 2 →