A bridging model for branch-and-bound algorithms on multi-core architectures

Nowadays, the evolution of multi-core architectures goes towards increasing the number of cores and levels of cache. Meanwhile, current typical parallel programming languages are unable to exploit the potential of these processors efficiently. In order to achieve desired performance on these hardwares we need to understand architectural parameters appropriately and also apply them in algorithm design. Computational models such as Multi-BSP, illustrate these parameters and explain adequate methods for designing algorithms on multi-cores. One of applicable categories of problems is Branch-and-Bound (BaB) that needs to be adapted by such model for implementing on these systems. In this paper, we have attempted to make a mapping between BaB run-time tree and the Memory Hierarchy Tree (MT) of multi-core processor. Multi-BSP model inspired us to introduce Multi-BaB model. Analogous to Multi-BSP analysis, bounds for communication and synchronization costs have been presented in the paper respecting BaB algorithms. This work is a step towards making multi-core programming efficient and tries to obtain correct analysis of BaB algorithm behavior on multi-core architectures.