Modelling of self-heating effect in thin SOI and Partial SOI LDMOS power devices

被引:41
作者
Lim, HT [1 ]
Udrea, F [1 ]
Garner, DM [1 ]
Milne, WI [1 ]
机构
[1] Univ Cambridge, Dept Engn, Cambridge CB2 1PZ, England
基金
英国工程与自然科学研究理事会;
关键词
D O I
10.1016/S0038-1101(99)00119-7
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a comprehensive 2-D and I-D study of the self-heating effect in thin Silicon-on-Insulator (SOI) and Partial SOI LDMOS power devices. A simple 1-D self-heating model based on a PSPICE RC thermal circuit which accounts for the temperature rise in on-state, transient and short-circuit conditions is developed. Unlike previous I-D modelling attempts for SOI devices, our model takes into account the feedback effect of the local device temperature on the thermal conductivity and specific heat through an equivalent electrical RC network consisting of voltage controlled resistors and capacitors. The 1-D model is thoroughly assessed against extensive 2-D thermal simulations performed using the SILVACO-ATLAS device simulator and the results indicate an excellent agreement in all operating conditions. Furthermore, an accurate comparison between the thin SOI and Partial SOI devices is carried out. (C) 1999 Elsevier Science Ltd. All rights reserved.
引用
收藏
页码:1267 / 1280
页数:14
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