High Holding Voltage SCR-LDMOS Stacking Structure With Ring-Resistance-Triggered Technique

被引：50

作者：

Ma, Fei ^{[1
]}

Zhang, Bin ^{[1
]}

Han, Yan ^{[1
]}

Zheng, Jianfeng ^{[1
]}

Song, Bo ^{[1
]}

Dong, Shurong ^{[1
]}

Liang, Hailian ^{[1
]}

机构：

[1] Zhejiang Univ, ESD Lab, Inst Microelect, Dept Informat Sci & Elect Engn, Hangzhou 310027, Peoples R China

来源：

IEEE ELECTRON DEVICE LETTERS | 2013年 / 34卷 / 09期

关键词：

Electrostatic discharge (ESD); holding voltage; latch-up immunity; laterally diffused metal-oxide-semiconductor (LDMOS); SCR; ESD; DEVICES;

D O I：

10.1109/LED.2013.2272591

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A novel ring-resistance-triggered stacked SCR-laterally diffused MOSs has been successfully verified in a 0.35 mu m, 30-V/5-V bipolar CMOS DMOS process to solve the coupling of trigger voltage and holding voltage in stacking structures. The holding voltage of the proposed structure can be modulated by varying stacking numbers, and a high holding voltage of 22 V has been achieved using six stacks. On the other side, the trigger voltage almost keeps constant at similar to 53 V and a high failure current of 3.5 A has been achieved.

引用

页码：1178 / 1180

页数：3

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