Design of an array processor for parallel skeletonization of images

被引:9
作者
Bourbakis, N
Steffensen, N
Saha, B
机构
[1] UNIV CRETE,ECE DEPT,IRAKLION 73100,GREECE
[2] MOTOROLA INC,COMP GRP,TEMPE,AZ 85282
[3] INTEL CORP,SAN JOSE,CA 95165
来源
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING | 1997年 / 44卷 / 04期
关键词
applications specific array processors (ASAP); image processing; parallel thinning algorithms; system design;
D O I
10.1109/82.566645
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents the design, evaluation, and the implementation of an application specific array processor (ASAP) desirable for high speed parallel skeletonization of binary images. The array processor receives the input image in a binary form and generates the skeleton of the nonzero regions (objects, or silhouettes) contained in the image in parallel. In particular, each processing element (PE) of the array processor receives additional information from the neighboring PE's and executes independently its own algorithm by maintaining or zeroing its own value ''1'' for the final generation of the skeleton of the object, The skeletons produced by this array processor are: 1) region's size independent (nonsensitive in small variation of shape) and 2) sensitive to the region's shape, The ability of the array processor to produce these two types of skeleton makes it flexible for image processing applications such as handwritten character recognition under uncertainty (non sensitive skeleton), or detection of defects on printing circuits (sensitive skeleton). A comparison of the proposed algorithm [parallel symmetric thinning algorithm (PSTA)] to a number of other parallel thinning algorithms is also provided indicating its advantages and disadvantages.
引用
收藏
页码:284 / 298
页数:15
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