FPGA-based Design and Implementation of High-speed Portable DSO

This paper proposed a solution of portable digital storage oscilloscope (DSO), in which FPGA is used as parallel logic controller of kernel and embedded processor NIOS II is programmed inside as serial digital processing core. Afterwards, differential clocks on LVDS level standard from the output of PLL in FPGA drive dual ADCs, which are interleaved sampling two ways of signal from the analog front end, which is mainly formed with differential amplifier and variable gain amplifier. Meanwhile, output of ADCs are sampled and memorized in FIFO by FPGA, before controlling logics determine whether a digital trigger should be caused. According to data from the author's test, a performance of 500Msps sample rate in real time and 60MHz above analog bandwidth can be offered by this solution.