A Cost-Effective Flip-Chip Interconnection for Applications from DC until 200 GHz

This paper presents design, fabrication, and characterization of a cost-effective flip-chip interconnection suitable for operation up to 200 GHz. The approach relies on gold balls produced with standard bonding tools, and welded on the pads of the interconnected chips by a thermo-compression process. Several simulation approaches have been used to optimize the interface, ranging from the stand-alone simulation of the gold balls up to the complete simulations of the test structures employed for the characterization of the proposed interface. The back-end-of-line of a commercially available 130 nm SiGe process was used to implement the test structures, and insertion-losses smaller than 0.5 dB at 100 GHz, and 1.5 dB at 200 GHz were demonstrated for the interface, in agreement with simulation results. The proposed approach reduces the insertion-loss by 1.5 dB at 150 GHz with respect to previous demonstrations making use of similar ground-signal-ground (GSG) pads interface, and fabrication procedure.