On-chip temperature control circuit using common devices

被引:0
|
作者
Braun, FD [1 ]
Parent, DW [1 ]
Papalias, TA [1 ]
机构
[1] San Jose State Univ, San Jose, CA 95192 USA
关键词
analog integrated circuits; cooling; heating; temperature; temperature control;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A circuit has been designed to control the temperature of the IC die upon which it resides. No special devices or layers are required. No external circuitry or special heat sinking is used. Equilibrium temperatures from below -40 degrees C to above +85 degrees C are attainable. Time to equilibrium is on the order of a few seconds. The 400 mu m x 500 mu m circuit has been manufactured by the MOSIS service in a TSMC 0.25 micron process and installed in a 40-pin DIEP package. Test results reveal temperature regulation within 0.3 degrees C for thermal control ranges of 4 degrees C to 40 degrees C.
引用
收藏
页码:215 / 218
页数:4
相关论文
共 50 条
  • [41] An on-chip temperature compensation circuit for an InGaP/GaAs HBT RF power amplifier
    李诚瞻
    陈志坚
    黄继伟
    王永平
    马传辉
    杨寒冰
    廖英豪
    周勇
    刘斌
    半导体学报, 2011, 32 (03) : 131 - 134
  • [42] X-band MMIC power amplifier with an on-chip temperature compensation circuit
    Yamauchi, K
    Iyama, Y
    Yamaguchi, M
    Ikeda, Y
    Takagi, T
    2001 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM DIGEST, VOLS 1-3, 2001, : 1071 - 1074
  • [43] An on-chip temperature compensation circuit for an InGaP/GaAs HBT RF power amplifier
    Li Chengzhan
    Chen Zhijian
    Huang Jiwei
    Wang Yongping
    Ma Chuanhui
    Yang Hanbing
    Liao Yinghao
    Zhou Yong
    Liu Bin
    JOURNAL OF SEMICONDUCTORS, 2011, 32 (03)
  • [44] Using a Josephson junction as an effective on-chip temperature sensor
    Durandetto, Paolo
    Sosso, Andrea
    SUPERCONDUCTOR SCIENCE & TECHNOLOGY, 2021, 34 (04):
  • [45] Quality Factor enhancement of on-chip inductor by using Negative Impedance Circuit
    Pham, KD
    Okada, K
    Masu, K
    2006 TOPICAL MEETING ON SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS, DIGEST OF PAPERS, 2006, : 115 - +
  • [46] An on-chip automatic tuning circuit using integration level approximation technique
    Lee, SD
    Jang, MJ
    Lee, WH
    PROCEEDINGS OF ASP-DAC '99: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 1999, 1999, : 265 - 268
  • [47] Parameter optimization of an on-chip voltage reference circuit using evolutionary programming
    Nam, D
    Seo, YD
    Park, LJ
    Park, CH
    Kim, B
    IEEE TRANSACTIONS ON EVOLUTIONARY COMPUTATION, 2001, 5 (04) : 414 - 421
  • [48] A Power Clamp Circuit Using Current Mirror for On-chip ESD Protection
    Lu, Guangyi
    Wang, Yuan
    Zhang, Xuelin
    Jia, Song
    Zhang, Ganggang
    Zhang, Xing
    2012 IEEE 11TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT-2012), 2012, : 887 - 889
  • [49] On-Chip Clocking for Nanomagnet Logic Devices
    Alam, Mohmmad Tanvir
    Siddiq, Mohammad Jafar
    Bernstein, Gary H.
    Niemier, Michael
    Porod, Wolfgang
    Hu, Xiaobo Sharon
    IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2010, 9 (03) : 348 - 351
  • [50] On-chip analog circuit diagnosis in systems-on-chip integration
    Noguchi, Koichiro
    Hashida, Takushi
    Nagata, Makoto
    ESSCIRC 2006: PROCEEDINGS OF THE 32ND EUROPEAN SOLID-STATE CIRCUITS CONFERENCE, 2006, : 118 - +