A Low-latency Carrier Phase Recovery Hardware for Coherent Optical Communication

被引:0
|
作者
Lin, Liyu [1 ]
Wang, Kaihui [1 ]
Chen, Yun [1 ]
Yu, Jianjun [1 ]
Zeng, Xiaoyang [1 ]
机构
[1] Fudan Univ, State Key Lab ASIC & Syst, Shanghai 200433, Peoples R China
基金
国家重点研发计划;
关键词
Low latency; carrier phase recovery; FPGA;
D O I
10.1109/ISCAS48785.2022.9937906
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Carrier phase recovery (CPR) determines the accuracy of the receiver in modern coherent optical communication. The accurate estimation and tracking of carriers are particularly vital with the increase of throughput for long-distance transmit. It is a challenge to implement a real-time system because the computational complexity increases with fractional bits. Moreover, the conversion between polar coordinates and Cartesian coordinates introduces a high latency. In this paper, we present an FPGA implementation of low latency Viterbi-Viterbi 4(th) Power Estimation (VV4E) based CPR, which mainly performs the computation in Cartesian coordinates and implements the trigonometric function with a look-up table (LUT). Evaluations on Xilinx ZCU102 show that at a frequency of 370MHz, it introduces a 22-cycle latency to handle the 29.6 GBd QPSK signals, which is the minimum value to our knowledge.
引用
收藏
页码:2506 / 2510
页数:5
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