Reconfigurable CMOS Divide-by-3/-5 Injection-Locked Frequency Divider for Dual-Mode 24/40 GHz PLL Application

被引:0
|
作者
Huang, Tzuen-Hsi [1 ]
Li, Sih-Han
Tsai, Pei-Kang [1 ]
Liu, Chin-Chih [1 ]
机构
[1] Natl Cheng Kung Univ, Dept Elect Engn, 1 Univ Rd, Tainan 70101, Taiwan
来源
PROCEEDINGS OF THE 2012 IEEE INTERNATIONAL SYMPOSIUM ON RADIO-FREQUENCY INTEGRATION TECHNOLOGY (RFIT) | 2012年
关键词
Frequency divider; injection locked; dual mode; phase-locked loop; reconfigurable divider;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a dual-mode injection-locked frequency divider (ILFD) which can operate at 24 or 40 GHz. By a switchable band pass filter (BPF) design, the second harmonic of output frequency appeared at the common node of the differential injection pair can be either peaked or suppressed. At the same time, the fourth harmonic can be suppressed or peaked in contrary. The input injection signal can mix with the correspondingly peaked harmonic to achieve the division-by-3 or division-by-5 function. With an injection power level of +4 dBm, the locking ranges of 3.2 GHz (for division-by-3) and 880 MHz (for division-by-5) are achieved as the tuning voltage V-tune is fixed at 1.8 V. The total operation ranges for the division-by-3 and division-by-5 modes are from 22.5 to 27.0 GHz and from 38.23 to 41.55 GHz, respectively, as V-tune increases from 0 to 1.8 V. The divider core consumes 17.02 mW at 1 V supply voltage and the output buffers totally consume 3.0 mW at 1.8 V.
引用
收藏
页码:68 / 70
页数:3
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