RF-SoC - Expectations and required conditions

被引:86
作者
Matsuzawa, A [1 ]
机构
[1] Matsushita Elect Ind Co Ltd, Semicond Co, Adv LSI Technol Dev Ctr, Osaka 5708501, Japan
关键词
CMOS; mixed-signal technology; packaging technology; RF; silicon; system-on-chip;
D O I
10.1109/22.981277
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper discusses the expectations for the development of radio-frequency systems-on-chip (RF-SoCs) that integrate RF, analog, and digital circuits, and the conditions under which they can be realized. Future RF systems will be increasingly large and complex. However, high integration technology is expected to reduce the circuit size, number of components, and total system cost. Over the past few years, rapid progress of scaled CMOS technology, and the introduction of SiGe technology have improved the performance of silicon RF devices and circuits to meet the requirements for conventional RF applications. The RF-SoC which may be said to be the ultimate goal for RF systems, is expected to improve silicon RF devices even further. However, before this is possible, strict requirements for system perfection, continuous cost reduction, ease of function and specification change, and process portability issues must be resolved. Difficulty in lowering power consumption of RF and analog circuits and of reducing the size of passive components and analog transistors diminish the appeal of the RF-SoC. The RF-SoC in deep submicrometer technology may be an unreasonable solution for some application areas. System-in-package may be one way to address this issue.
引用
收藏
页码:245 / 253
页数:9
相关论文
共 34 条
[1]   Direct-conversion radio transceivers for digital communications [J].
Abidi, AA .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1995, 30 (12) :1399-1410
[2]   A 1.8-GHz CMOS low-phase-noise voltage-controlled oscillator with prescaler [J].
Craninckx, J ;
Steyaert, MSJ .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1995, 30 (12) :1474-1482
[3]   A 1.8-GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors [J].
Craninckx, J ;
Steyaert, MSJ .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1997, 32 (05) :736-744
[4]  
CRANINCKX J, 1997, CUST INT CIRC C, P403
[5]   A 2-GHz low-phase-noise integrated LC-VCO set with flicker-noise upconversion minimization [J].
De Muer, B ;
Borremans, M ;
Steyaert, M ;
Puma, GL .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2000, 35 (07) :1034-1038
[6]   A 1.9-GHz CMOS VCO with micromachined electromechanically tunable capacitors [J].
Dec, A ;
Suyama, K .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2000, 35 (08) :1231-1237
[7]  
DEC A, 1999, IEEE ISSCC FEB, P80
[8]   DESIGN OF ION-IMPLANTED MOSFETS WITH VERY SMALL PHYSICAL DIMENSIONS [J].
DENNARD, RH ;
GAENSSLEN, FH ;
YU, HN ;
RIDEOUT, VL ;
BASSOUS, E ;
LEBLANC, AR .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (05) :256-268
[9]   The equivalence of van der Ziel and BSIM4 models in modeling the induced gate noise of MOSFETs [J].
Goo, JS ;
Liu, W ;
Choi, CH ;
Green, KR ;
Yu, ZP ;
Lee, TH ;
Dutton, RW .
INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST, 2000, :811-814
[10]  
GOTOH S, 2001, IEEE INT SOL STAT CI, P182