Applying the Taguchi parametric design to optimize the solder paste printing process and the quality loss function to define the specifications

被引:21
作者
Huang, Chien-Yi [1 ]
机构
[1] Natl Taipei Univ Technol, Dept Ind Engn & Management, Taipei, Taiwan
关键词
Process specification; Quality loss function; Solder paste printing; Taguchi parametric design; ALLOYS; VOLUME; BGA;
D O I
10.1108/SSMT-03-2017-0010
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Purpose This research aims to study the stencil printing process of the quad flat package (QFP) component with a pin pitch of 0.4 mm. After the optimization of the printing process, the desired inspection specification is determined to reduce the expected total process loss. Design/methodology/approach Static Taguchi parametric design is applied while considering the noise factors possibly affecting the printing quality in the production environment. The Taguchi quality loss function model is then proposed to evaluate the two types of inspection strategies. Findings The optimal parameter-level treatment for the solder paste printing process includes a squeegee pressure of 11 kg, a stencil snap-off of 0.14 mm, a cleaning frequency of the stencil once per printing and using an air gun after stencil wiping. The optimal upper and lower specification limits are 119.8 mu m and 110.3 mu m, respectively. Originality/value Noise factors in the production environment are considered to determine the optimal printing process. For specific components, the specification is established as a basis for subsequent processes or reworks.
引用
收藏
页码:217 / 226
页数:10
相关论文
共 19 条
[1]  
[Anonymous], 1988, QUAL ENG, DOI DOI 10.1080/08982118808962639
[2]   Investigation of the wetting of PCBs with SnCu (HASL) and Snimm finishes by SnZnBiln solders [J].
Bukat, Krystyna ;
Sitek, Janusz ;
Koscielski, Marek ;
Moser, Zbigniew ;
Gasior, Wladyslaw ;
Pstrus, Janusz .
SOLDERING & SURFACE MOUNT TECHNOLOGY, 2012, 24 (01) :4-11
[3]  
Chong Y.Z., 2000, TAGUCHI QUALITY ENG, P10
[4]   Thermophysical properties and wetting behavior on Cu of selected SAC alloys [J].
Fima, Przemyslaw ;
Gancarz, Tomasz ;
Pstrus, Janusz ;
Bukat, Krystyna ;
Sitek, Janusz .
SOLDERING & SURFACE MOUNT TECHNOLOGY, 2012, 24 (02) :71-76
[5]   A grey-ANN approach for optimizing the QFN component assembly process for smart phone application [J].
Huang, Chien-Yi ;
Chen, Ching-Hsiang ;
Lin, Yueh-Hsun .
SOLDERING & SURFACE MOUNT TECHNOLOGY, 2016, 28 (02) :63-73
[6]   Applying CHAID algorithm to investigate critical attributes of void formation in QFN assembly [J].
Huang, Chien-Yi ;
Lin, Yueh-Hsun .
SOLDERING & SURFACE MOUNT TECHNOLOGY, 2013, 25 (02) :117-127
[7]   The solder paste printing process: critical parameters, defect scenarios, specifications, and cost reduction [J].
Huang, Chien-Yi ;
Lin, Yueh-Hsun ;
Ying, Kuo-Ching ;
Ku, Chen-Liang .
SOLDERING & SURFACE MOUNT TECHNOLOGY, 2011, 23 (04) :211-223
[8]  
Kapur K.C., 1987, Quality, Design, planning and Control, V1, P23
[9]   Effect of selected process parameters on durability and defects in surface-mount assemblies for portable electronics [J].
Ladani, Leila J. ;
Dasgupta, Abhijit ;
Cardoso, Idelcio ;
Monlevade, Eduardo .
IEEE TRANSACTIONS ON ELECTRONICS PACKAGING MANUFACTURING, 2008, 31 (01) :51-60
[10]   DMAIC approach to improve the capability of SMT solder printing process [J].
Li, Ming-Hsien Caleb ;
Al-Refaie, Abbas ;
Yang, Cheng-Yu .
IEEE TRANSACTIONS ON ELECTRONICS PACKAGING MANUFACTURING, 2008, 31 (02) :126-133