Fine grinding of silicon wafers: a mathematical model for the wafer shape

被引：35
|
作者：
Sun, WP
Pei, ZJ [1 ]
Fisher, GR
机构：
[1] Kansas State Univ, Dept Ind & Mfg Syst Engn, Manhattan, KS 66506 USA
[2] MEMC Elect Mat Inc, St Peters, MO 63376 USA
来源：
INTERNATIONAL JOURNAL OF MACHINE TOOLS & MANUFACTURE | 2004年 / 44卷 / 7-8期
关键词：
grinding; machining; modeling; semiconductor material; silicon wafer;
D O I：
10.1016/j.ijmachtools.2004.02.012
中图分类号：
T [工业技术];
学科分类号：
08 ;
摘要：
Over 90% of semiconductors are built on silicon wafers. The fine grinding process has great potential to produce very flat wafers at a low cost. Four papers on fine grinding have been previously published by the authors. The first paper discussed its uniqueness and special requirements. The second one presented the results of a designed experimental investigation. The third and fourth papers presented mathematical models for the chuck shape and the grinding marks, respectively. As a follow up, this paper develops a mathematical model for the wafer shape. After the model is described, its practical applications in wafer manufactur-ing are discussed. (C) 2004 Elsevier Ltd. All rights reserved.
引用
收藏
页码：707 / 716
页数：10
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