Adaptive Processor Architecture - Invited Paper

被引:0
作者
Huebner, Michael [1 ]
Goehringer, Diana [2 ]
Tradowsky, Carsten [3 ]
Henkel, Joerg [4 ]
Becker, Juergen [3 ]
机构
[1] Ruhr Univ Bochum, Chair Embedded Syst Informat Technol ESIT, Bochum, Germany
[2] Karlsruhe Inst Technol KIT, Inst Data Proc & Elect IP E, Karlsruhe, Germany
[3] Karlsruhe Inst Technol KIT, Inst Informat Proc Technol ITV, Karlsruhe, Germany
[4] Karlsruhe Inst Technol KIT, 4Chair Embedded Syst CES, Karlsruhe, Germany
来源
2012 INTERNATIONAL CONFERENCE ON EMBEDDED COMPUTER SYSTEMS (SAMOS): ARCHITECTURES, MODELING AND SIMULATION | 2012年
关键词
Dynamic and partial processor reconfiguration; FPGA; internal configuration access port (lCAP); processor adaptation; microarchitecture; CACHE; ENERGY;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
This paper introduces a novel methodology to adapt the microarchitecture of a processor at run-time. The goal is to tailor the internal architecture to the requirements of an application and the data to be processed. The latter parameter is normally not known at design time. This leads to the development of more general purpose processors which are capable to handle the data to be processed in any case. With the novel approach which keeps the microarchitecture of a processor flexible, the processor can start as a general purpose device and end up with a specific parameterization, comparable with application specific processor architectures. Furthermore, the increased degree of freedom which is enabled through the approach for a novel quality of processors is described.
引用
收藏
页码:244 / 251
页数:8
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