Unified coprocessor for high-speed AES-128 and SM4 encryption

被引：4
作者：
Xu, Yongkang [1 ]
Deng, Feng [2 ]
Xu, Weihan [1 ]
Huo, Guanting [1 ]
Yang, Yang [1 ]
Jin, Yufeng [1 ]
Cui, Xiaole [1 ]
机构：
[1] Peking Univ, Shenzhen Grad Sch, Beijing, Peoples R China
[2] Shenzhen State Micro Technol Co Ltd, Shenzhen, Peoples R China
来源：
2022 IEEE 6TH ADVANCED INFORMATION TECHNOLOGY, ELECTRONIC AND AUTOMATION CONTROL CONFERENCE (IAEAC) | 2022年
关键词：
Cryptographic coprocessor; AES-128; SM4; RCSL; HIGH-THROUGHPUT; S-BOX; AES; EFFICIENT; DESIGN;
D O I：
10.1109/IAEAC54830.2022.9929737
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
In modern systems-on-chip, cryptographic coprocessors bring more flexibility to design, not only accelerating the encryption process but also compressing design resources by sharing algorithm units. A highperformance unified coprocessor for AES-128 and SM4 encryption is proposed in this paper. On the one hand, based on the similarities between the two types of algorithms, the multiplicative inverse (MI) unit of the Sbox is realized in the composite field, and by sharing the reconfigurable Sbox logic (RCSL), the hardware resource consumption of circuits compatible with both algorithms is reduced. On the other hand, global pipeline technology based on shared-RCSL is used to improve the throughput of the coprocessor. In TSMC 65nm 1.08V CMOS technology, compared to the synthesized results of independently AES-128 and SM4, the area and power at 500MHz of the unified coprocessor are reduced by 42% and 43%, respectively.
引用
收藏
页码：640 / 644
页数：5
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