Unified coprocessor for high-speed AES-128 and SM4 encryption

被引:4
作者
Xu, Yongkang [1 ]
Deng, Feng [2 ]
Xu, Weihan [1 ]
Huo, Guanting [1 ]
Yang, Yang [1 ]
Jin, Yufeng [1 ]
Cui, Xiaole [1 ]
机构
[1] Peking Univ, Shenzhen Grad Sch, Beijing, Peoples R China
[2] Shenzhen State Micro Technol Co Ltd, Shenzhen, Peoples R China
来源
2022 IEEE 6TH ADVANCED INFORMATION TECHNOLOGY, ELECTRONIC AND AUTOMATION CONTROL CONFERENCE (IAEAC) | 2022年
关键词
Cryptographic coprocessor; AES-128; SM4; RCSL; HIGH-THROUGHPUT; S-BOX; AES; EFFICIENT; DESIGN;
D O I
10.1109/IAEAC54830.2022.9929737
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In modern systems-on-chip, cryptographic coprocessors bring more flexibility to design, not only accelerating the encryption process but also compressing design resources by sharing algorithm units. A highperformance unified coprocessor for AES-128 and SM4 encryption is proposed in this paper. On the one hand, based on the similarities between the two types of algorithms, the multiplicative inverse (MI) unit of the Sbox is realized in the composite field, and by sharing the reconfigurable Sbox logic (RCSL), the hardware resource consumption of circuits compatible with both algorithms is reduced. On the other hand, global pipeline technology based on shared-RCSL is used to improve the throughput of the coprocessor. In TSMC 65nm 1.08V CMOS technology, compared to the synthesized results of independently AES-128 and SM4, the area and power at 500MHz of the unified coprocessor are reduced by 42% and 43%, respectively.
引用
收藏
页码:640 / 644
页数:5
相关论文
共 50 条
  • [21] High-Speed architecture for Advanced Encryption Standard Algorithm
    Rachh, Rashmi Ramesh
    AnandaMohan, P. V.
    Anami, B. S.
    2012 ASIA PACIFIC CONFERENCE ON POSTGRADUATE RESEARCH IN MICROELECTRONICS & ELECTRONICS (PRIMEASIA), 2012, : 167 - 172
  • [22] Implementation of a High-Speed and High-Throughput Advanced Encryption Standard
    Kumar, T. Manoj
    Karthigaikumar, P.
    INTELLIGENT AUTOMATION AND SOFT COMPUTING, 2022, 31 (02) : 1025 - 1036
  • [23] Design and Performance Evaluation of a Novel High-Speed Hardware Architecture for Keccak Crypto Coprocessor
    Sanli, Mustafa
    INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING, 2024, 52 (5-6) : 367 - 379
  • [24] Exploring the high-throughput and low-delay hardware design of SM4 on FPGA
    Chen, Yixiao
    Song, Jinfeng
    Chen, Shuai
    Cao, Yuan
    Ye, Jing
    Li, Huawei
    Li, Xiaowei
    Lou, Xin
    Yao, Enyi
    2022 19TH INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), 2022, : 211 - 212
  • [25] Low power and high-speed FPGA implementation for 4D memristor chaotic system for image encryption
    Hagras, Esam A. A.
    Saber, Mohamed
    MULTIMEDIA TOOLS AND APPLICATIONS, 2020, 79 (31-32) : 23203 - 23222
  • [26] Low-area and high-speed hardware architectures of KLEIN lightweight block cipher for image encryption
    Singh, Pulkit
    Agrawal, Bhaskar
    Chaurasiya, Rahul Kumar
    Acharya, Bibhudendra
    JOURNAL OF ELECTRONIC IMAGING, 2023, 32 (01)
  • [27] Medical image encryption using high-speed scrambling and pixel adaptive diffusion
    Hua, Zhongyun
    Yi, Shuang
    Zhou, Yicong
    SIGNAL PROCESSING, 2018, 144 : 134 - 144
  • [28] Efficient Implementation of AES-CTR and AES-ECB on GPUs With Applications for High-Speed FrodoKEM and Exhaustive Key Search
    Lee, Wai-Kong
    Seo, Hwa Jeong
    Seo, Seog Chung
    Hwang, Seong Oun
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2022, 69 (06) : 2962 - 2966
  • [29] A Time-/Frequency-Domain Side-Channel Attack Resistant AES-128 and RSA-4K Crypto-Processor in 14-nm CMOS
    Kumar, Raghavan
    Liu, Xiaosen
    Suresh, Vikram
    Krishnamurthy, Harish K.
    Satpathy, Sudhir
    Anders, Mark A.
    Kaul, Himanshu
    Ravichandran, Krishnan
    De, Vivek
    Mathew, Sanu K.
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2021, 56 (04) : 1141 - 1151
  • [30] Cryptanalysis and improvement of medical image encryption using high-speed scrambling and pixel adaptive diffusion
    Chen, Yucheng
    Tang, Chunming
    Ye, Ruisong
    SIGNAL PROCESSING, 2020, 167