Noise in Charge Amplifiers-A gm/ID Approach

被引:7
作者
Alvarez, Enrique [1 ]
Avila, Diego [1 ]
Campillo, Hernan [1 ]
Dragone, Angelo [2 ]
Abusleme, Angel [1 ]
机构
[1] Pontificia Univ Catolica Chile, Dept Elect Engn, Santiago, Chile
[2] SLAC Natl Accelerator Lab, Menlo Pk, CA 94025 USA
关键词
Low-noise amplifiers; noise; nuclear physics instrumentation; SUBMICRON TECHNOLOGY; DETECTORS; CMOS; DESIGN; OPTIMIZATION; METHODOLOGY;
D O I
10.1109/TNS.2012.2208270
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Charge amplifiers represent the standard solution to amplify signals from capacitive detectors in high energy physics experiments. In a typical front-end, the noise due to the charge amplifier, and particularly from its input transistor, limits the achievable resolution. The classic approach to attenuate noise effects in MOSFET charge amplifiers is to use the maximum power available, to use a minimum-length input device, and to establish the input transistor width in order to achieve the optimal capacitive matching at the input node. These conclusions, reached by analysis based on simple noise models, lead to sub-optimal results. In this work, a new approach on noise analysis for charge amplifiers based on an extension of the g(m)/I-D methodology is presented. This method combines circuit equations and results from SPICE simulations, both valid for all operation regions and including all noise sources. The method, which allows to find the optimal operation point of the charge amplifier input device for maximum resolution, shows that the minimum device length is not necessarily the optimal, that flicker noise is responsible for the non-monotonic noise versus current function, and provides a deeper insight on the noise limits mechanism from an alternative and more design-oriented point of view.
引用
收藏
页码:2457 / 2462
页数:6
相关论文
共 17 条
[1]   Noise power normalisation: extension of gm/ID technique for noise analysis [J].
Alvarez, E. ;
Abusleme, A. .
ELECTRONICS LETTERS, 2012, 48 (08) :430-431
[2]  
[Anonymous], 2001, STAR HSPIC MANUAL200
[3]   MOSFET optimization in deep submicron technology for charge amplifiers [J].
De Geronimo, G ;
O'Connor, P .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2005, 52 (06) :3223-3232
[4]   Front-end electronics for imaging detectors [J].
De Geronimo, G ;
O'Connor, P ;
Radeka, V ;
Yu, B .
NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION A-ACCELERATORS SPECTROMETERS DETECTORS AND ASSOCIATED EQUIPMENT, 2001, 471 (1-2) :192-199
[5]   Optimization of front-end design in imaging and spectrometry applications with room temperature semiconductor detectors [J].
Fabris, L ;
Manfredi, P .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2002, 49 (04) :1978-1985
[6]   Improved synthesis of gain-boosted regulated-cascode CMOS stages using symbolic analysis and gm/ID methodology [J].
Flandre, D ;
Viviani, A ;
Eggermont, JP ;
Gentinne, B ;
Jespers, PGA .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1997, 32 (07) :1006-1012
[7]   PULSE-SHAPING IN LOW-NOISE NUCLEAR AMPLIFIERS - PHYSICAL APPROACH TO NOISE-ANALYSIS [J].
GOULDING, FS .
NUCLEAR INSTRUMENTS & METHODS, 1972, 100 (03) :493-&
[8]  
Gray P. R., 2009, Analysis and Design of Analog Integrated Circuits, V5th edn
[9]   Design of low noise charge amplifier in sub-micron technology for fast shaping time [J].
Grybos, Pawel ;
Idzik, Marek ;
Skoczen, Andrzej .
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2006, 49 (02) :107-114
[10]  
Liu W., 2005, BSIM3V3 3 MOSFET MOD