New insights in the passivation of high-k/InP through interface characterization and metal-oxide-semiconductor field effect transistor demonstration: Impact of crystal orientation

We have systematically studied the passivation of InP (100) and (111) A substrate using atomic-layer-deposited Al2O3 as gate dielectric. Modified high- and low-frequency method and full conductance method has been applied to evaluate the interface trap density (D-it) distribution at Al2O3/InP interface through MOS capacitor (MOSCAP) and MOSFET measurements. Lower D-it towards conduction band is obtained from (111) A surface, accompanied by an increase in midgap D-it. This leads to the demonstration of record-high drive current (I-ds = 600 mu A/mu m) for a InP (111) A NMOSFET with gate length (L-G) of 1 mu m and relatively large subthreshold swing of 230 mV/dec at off-state. Detailed DC IV and current drift measurements confirm the trap distribution from capacitance-voltage characterization. A trap neutral level (E-0) model is proposed to explain all observations from MOSCAP and MOSFET characterizations. A universal behavior of the E-0 shift on III-V (111) A surface is also analyzed and this observation can play a pivotal role in interface engineering for future III-V CMOS technology with 3D structures. (C) 2013 American Institute of Physics. [http://dx.doi.org/10.1063/1.4772944]