A high-speed/low-power architecture for 1-D discrete biorthogonal wavelet transform

被引：0

作者：

Uzun, IS ^{[1
]}

Amira, A ^{[1
]}

Bouridane, A ^{[1
]}

机构：

[1] Queens Univ Belfast, Sch Comp Sci, Belfast, Antrim, North Ireland

来源：

PROCEEDINGS OF THE 46TH IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS & SYSTEMS, VOLS 1-3 | 2003年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Biorthogonal wavelets offer improved coding gain and an efficient treatment of boundaries in signal coding applications. In this paper, we propose a scalable pipelined architecture that performs I-D Discrete Biorthogonal Wavelet Transform (DBWT) with K decomposition levels in N-0/2 clock cycles. Therefore, it is at least twice as fast as other known DBWT architectures. The performance of the architecture has been verified and evaluated by implementations on Xilinx Virtex2000E FPGA chip. Very high data-throughput rates up to 320 MegaSamples/sec, with efficient hardware utilisation have been achieved.

引用

页码：1451 / 1454

页数：4

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