A 2-10 GHz Ultra-Wideband Common-Gate Low Noise Amplifier using Body Bias Technique in 0.18 μm CMOS

This In this paper a 2-10 GHz Common-Gate (CG) cascoded LNA with body bias technique is presented. The proposed 2-stage LNA is designed using 0.18 mu m CMOS process. The first stage is a Common Gate used in cascade with the cascoded second stage. The input impedance of the CG stage is matched with the antenna impedance i.e. 50 Omega in the frequency range of interest. The 2-stage configuration has high supply voltage requirements due to stacking of transistors. Body bias technique is used to lower the required supply voltage which leads to reduced power consumption and low noise figure at higher frequencies. The cascode amplifier in first and second stage enhances the gain and provides better reverse isolation. The proposed LNA shows the simulation results of less than -13 dB input return loss (S-11), maximum power gain (S-21) of 12.2 dB at 3 GHz and a noise figure of 3.7-6.2 dB over the full frequency band while consuming only 48 mW from a 1.8 V supply voltage. The linearity analysis shows a 1 dB compression point of -10 dBm, IIP3 and OIP3 of -4.4 dBm and 6.18 dBm respectively.