Modified Multilevel Inverters With Reduced Structures Based on PackedU-Cell

Multilevel inverters are capable of generating high-quality staircase pseudosinusoidal voltage waveform with low total harmonic distortion. These types of topologies may require large number of switches and power supplies. This leads to higher cost and volume of the converter along with complicated control algorithms. Recently, a branch of multilevel converters is emerged as compact power conversion units, in which their "reduced-structure" topologies use lower number of active and passive devices compared with the available topologies. Packed U-cell (PUC), a new reduced-structure multilevel converter, has been recently reported in the literature to reduce component count. PUC requires lesser active switches as compared to the existing counterparts. However, there are some drawbacks associated with this topology such as restricted maximum output voltage, high-voltage stress on switches, and limited performance to low-voltage applications. The available literature presents generalization of the topology with special asymmetrical source ratio, but no sufficient and effective investigations have been made for modified structures or other symmetrical or asymmetrical source ratio with cascaded configurations. In this paper, the issues associated with PUC are addressed and two approaches as remedy are presented. The first approach presents a comprehensive analysis of cascaded topologies with the proposed basic units, and the second approach is related to a new modified configuration on the basis of the conventional converter for improving the performance of the PUC in terms of total blocking voltage, switch ratings, and extending its performance to high-voltage applications. Moreover, the design of a novel 49-level modified structure and 147-level cascade inverter based on conventional PUC is analyzed under optimal number of dc sources and power switches to get the best possible topology as a solution. Finally, the experimental validations were performed by implementing laboratory prototypes.