System Synthesis from UML/MARTE Models

被引:0
|
作者
Posadas, Hector [1 ]
Penil, Pablo [1 ]
Nicolas, Alejandro [1 ]
Villar, Eugenio [1 ]
机构
[1] Univ Cantabria, Microelect Engn Grp, E-39005 Santander, Spain
来源
PROCEEDINGS OF THE 2013 ELECTRONIC SYSTEM LEVEL SYNTHESIS CONFERENCE (ESLSYN) | 2013年
关键词
UML; MARTE; SW synthesis; MPSoC; EMBEDDED SOFTWARE; GENERATION;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Model-Driven Engineering (MDE) based on UML is a mature methodology for software development. However, its application to HW/SW embedded system specification and design requires specific features not covered by the language. For this reason, the MARTE profile for Real-Time and Embedded systems was defined. It has proven to be powerful enough to support holistic system modeling under different views. This single-source model is able to capture the required information, enabling the automatic generation of executable and configurable models for fast performance analysis without requiring additional engineering effort. As a result of this performance analysis suitable system architecture can be decided. At this point, the SW stack to be executed by each processing node in the selected heterogeneous platform has to be generated. In the general case this is a tedious and error-prone process with little assistance from available tools. Current practices oblige the SW engineer to develop the code for each node of the heterogeneous multi-core platform by hand. The code has to be written specifically for the selected architecture and architectural mapping, thus reducing reusability. In order to overcome this limitation, the FP7 PHARAON project aims to develop tools able to automatically generate the code to be executed in each node from the initial system model. This affects not only the application code, the static and run-time libraries (e. g. OpenMP/OpenCL), the middleware and communication functions, but also the OS and the driver calls in each node.
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页数:8
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