共 25 条
- [1] [Anonymous], IEEE T VERY LARGE SC
- [2] Building manycore processor-to-DRAM networks with monolithic silicon photonics [J]. 16TH ANNUAL IEEE SYMPOSIUM ON HIGH-PERFORMANCE INTERCONNECTS, PROCEEDINGS, 2008, : 21 - +
- [5] Briere M., 2007, DESIGN AUTOMATION TE, P1
- [6] Networks-on-Chip in Emerging Interconnect Paradigms: Advantages and Challenges [J]. 2009 3RD ACM/IEEE INTERNATIONAL SYMPOSIUM ON NETWORKS-ON-CHIP, 2009, : 93 - +
- [8] A CLUSTERING TECHNIQUE FOR DIGITAL-COMMUNICATIONS CHANNEL EQUALIZATION USING RADIAL BASIS FUNCTION NETWORKS [J]. IEEE TRANSACTIONS ON NEURAL NETWORKS, 1993, 4 (04): : 570 - 579
- [10] A Low-power Low-cost Optical Router for Optical Networks-on-Chip in Multiprocessor Systems-on-Chip [J]. 2009 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, 2009, : 19 - +