Low Power Balun Design for 1.575 GHz in 90 nm CMOS Technology

被引：0

作者：

Gradzki, Jacek ^{[1
]}

机构：

[1] Warsaw Univ Technol, Inst Microelect & Optoelect, PL-00662 Warsaw, Poland

来源：

2012 IEEE 15TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS & SYSTEMS (DDECS) | 2012年

关键词：

Balun; phase splitter; low power; RFIC; GPS; CMOS; UMC; 90; nm;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper low power balun design is presented. It is optimized for 1.575 GHz and designed in 90 nm UMC CMOS technology. Current consumption is only 0.44 mA under 1.2 V supply voltage. The simulation shows that gain and phase imbalance are equal to 0.08 dB and 0.045 degrees, respectively. Single-ended power gain of this circuit is 2.2 dB. A special dimension matching has been made to minimize circuit susceptibility to variation of the manufacturing process.

引用

页码：250 / 253

页数：4

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