Compact Switched Capacitor Multilevel Inverter (CSCMLI) With Self-Voltage Balancing and Boosting Ability

被引:165
作者
Ali, Jagabar Sathik Mohamed [1 ]
Krishnasamy, Vijayakumar [1 ]
机构
[1] SRM Inst Sci & Technol, Dept Elect & Elect Engn, Chennai 603203, Tamil Nadu, India
关键词
Cascaded multilevel inverter; pulsewidth modulation (PWM) technique; single-stage capacitormodule; voltage balancing; voltage boosting; TOPOLOGY;
D O I
10.1109/TPEL.2018.2871378
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This letter presents a compact switched capacitor multilevel inverter (CSCMLI) topology with reduced switch count and with self-voltage balancing and boosting ability. The operational mode of the proposed CSCMLI is discussed. A comparative analysis in terms of number of switches and blocking voltages is presented against recent switched capacitor multilevel inverter topologies. Further to enhance the quality of the output voltage, a new level shifted multicarrier pulsewidth modulation (PWM) technique is recommended. This modulation technique produces low THD and high rms voltage. The proposed modulation technique is implemented in the nine-level CSCMLI with single dc source and two capacitors. The simulated and experimental results are verified for a switching frequency of 50 Hz and 2.5 kHz using the proposed PWM control.
引用
收藏
页码:4009 / 4013
页数:5
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