Influence of bulk bias on negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin SiON gate dielectrics

Bulk (well) bias effects (grounded, positively biased, and floating) on both static and dynamic negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin SiON gate dielectrics were systematically investigated. The device degradation under both static and dynamic negative bias temperature (NBT) stresses with relatively large gate voltage (V-g) is significantly enhanced by a positive bulk bias (V-b). Moreover, the device degradation under bipolar pulsed bias temperature (BT) stress is dramatically enhanced by floating the bulk electrode. Both phenomena can be attributed to an additional degradation related to hot hole injection. The holes are energized by an electrical field of the induced depletion region between channel and bulk provided by the positive V-b or, in the case of bipolar pulsed BT stress with the bulk electrode floating, by the transient depletion region below the channel induced by the p-n junction between source (drain) and bulk upon the gate voltage V-g being switched from positive to negative with a transition time less than about 0.2-100 ms. (c) 2006 American Institute of Physics.