Challenges forTest and Fault-Tolerance due to Convergence of Electronics, Semiconductor Systems and Computing

被引:0
作者
Ahmad, Afaq [1 ]
机构
[1] Sultan Qaboos Univ, Coll Engn, Dept Elect & Comp Engn, POB 33, Muscat 123, Oman
来源
2017 INTERNATIONAL CONFERENCE ON INFOCOM TECHNOLOGIES AND UNMANNED SYSTEMS (TRENDS AND FUTURE DIRECTIONS) (ICTUS) | 2017年
关键词
Semiconductor; Fault-tolerance; Reliability; Test methodology; Dual function; Modular redundancy; Design for Testability (DFT); Built-In Self-Test; Linear Feedback Shift Registers (LFSRs); PRIMITIVE POLYNOMIALS; SIGNATURE ANALYSIS; TESTING TECHNIQUE; SHIFT REGISTERS; LFSR; SEQUENCES;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Convergence of electronics, semiconductor systems and computing are rapidly transforming society at much faster pace than incorporation fault-tolerance and test methodologies in the systems. Further, underlying hardware and software in communication, security, quality of life, health, economic or financial well-being systems are increasingly being used for making decisions that influence individual and society. Consequently, it is imperative that the underlying hardware and software perform correctly and be defect free. However, to achieve zero defect through testing, screening and incorporation of redundancies is extremely challenging. This is what exactly the theme of my talk. During my presentation I will touch upon the mechanisms and issues to cope with the challenges.
引用
收藏
页码:64 / 68
页数:5
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