Low Cost TSV Integration for Advanced Packaging Technologies.

被引:0
作者
Morikawa, Yasuhiro [1 ]
Murayama, Takahide [1 ]
Sakuishi, Toshiyuki [1 ]
Tanaka, Ai [1 ]
Nakamuta, Yuu [1 ]
Suu, Koukou [1 ]
机构
[1] ULVAC Inc, Inst Semicond & Elect Technol, Susono, Shizuoka 4101231, Japan
来源
2012 2ND IEEE CPMT SYMPOSIUM JAPAN | 2012年
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中图分类号
T [工业技术];
学科分类号
08 ;
摘要
In recent years, "2.5D silicon interposers" and "Full 3D stacked" technology for high-performance LSI has attracted much attention since this technology can solve interconnection problems using TSV (Through Silicon Via) to electrically connect stacked LSI. 2.5D and 3D Si integration has great advantages over conventional 2D devices such as high packaging density, small wire length, high-speed operation, low power consumption, and high feasibility for parallel processing. The novel etching technology has provided for TSV fabrication which is the epoch-making and practical new technology without "Bosch" method. This new etch technology is "direct etching" method. So far, anisotropic and high Si etch rate with highly photo-resist selectivity is a tall order, but new direct etching can achieve higher than aspect ratio above 10 at the etching speed that is more than 10um/min in TSV of 10um diameter. Of course the selectivity of photo-resist is realized more than 1:30, and the sidewall is the smooth finish less than 50 nm. The direct etch is environment conscious process. This is because it does not use fluorocarbon gases in direct Si etching, which main gases are SF6 and O2. Therefore, this direct etch process is lower cost than gas switching process. In addition, the smooth sidewall has also brought about low cost of deposition processes for PE-CVD and PVD.
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页数:4
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