Hermetic Wafer Level Thin Film Packaging for MEMS

被引:2
|
作者
Soon, Jeffrey Bo Woon [1 ]
Singh, Navab [1 ]
Calayir, Enes [2 ]
Fedder, Gary K. [2 ]
Piazza, Gianluca [2 ]
机构
[1] ASTAR, Inst Microelect, Singapore 117685, Singapore
[2] Carnegie Mellon Univ, Dept Elect & Comp Engn, Pittsburgh, PA 15213 USA
关键词
component; Wafer level packaging (WLP); MEMS; Hermetic sealing; MEMS packaging;
D O I
10.1109/ECTC.2016.317
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We report a hermetic thin film packaging on aluminum nitride AlN RF MEMS platforms that is entirely CMOS compatible and wafer level executed. The process flow, including release of multiple free-moving body and encapsulation of the functional structures are demonstrated using 8" wafer level thin film micromachining technology. The encapsulated devices are reported to survive post CMOS assembly processes such as wafer level dicing and flip-chip bonding. Both fabrication outcome and measurement results indicate high possibility in cost effective and footprint reduction in MEMS integration technology.
引用
收藏
页码:857 / 862
页数:6
相关论文
共 50 条
  • [41] Wafer level hermetic bonding and packaging using recrystallized parylene
    Maharshi, Vikram
    Ahmad, Imran
    Agarwal, Ajay
    Mitra, Bhaskar
    JOURNAL OF MICROMECHANICS AND MICROENGINEERING, 2023, 33 (01)
  • [42] Low Temperature Direct Bonding for Hermetic Wafer level Packaging
    Nie, Lei
    Shi, Tielin
    Tang, Zirong
    Liu, Shiyuan
    Liao, Guanglan
    2009 4TH IEEE INTERNATIONAL CONFERENCE ON NANO/MICRO ENGINEERED AND MOLECULAR SYSTEMS, VOLS 1 AND 2, 2009, : 472 - 475
  • [43] Metal-Assisted Hermetic Wafer-Level Packaging
    Chagnon, Dany
    Isik, Dilek
    Levesque, Pierre
    Lewis, Francois
    Caza, Marie-Eve
    Le, Xuan Than
    Poirier, Jean-Sebastien
    Michel, Damien
    Larger, Ronan
    Moutanabbir, Oussama
    2014 4TH IEEE INTERNATIONAL WORKSHOP ON LOW TEMPERATURE BONDING FOR 3D INTEGRATION (LTB-3D), 2014, : 60 - 60
  • [44] Wafer level packaging for MEMS Geiger counter
    Miyamoto, Asei
    Hashimoto, Taichi
    Makimura, Kenichi
    Kanda, Kensuke
    Fujita, Takayuki
    Maenaka, Kazusuke
    PROCEEDINGS OF THE 2012 FIFTH INTERNATIONAL CONFERENCE ON EMERGING TRENDS IN ENGINEERING AND TECHNOLOGY (ICETET 2012), 2012, : 66 - 69
  • [45] Challenges of Wafer-Level MEMS Packaging
    Schuler-Watkins, Sebastian
    Reichenbach, Ralf
    Hansen, Uwe
    2015 EUROPEAN MICROELECTRONICS PACKAGING CONFERENCE (EMPC), 2015,
  • [46] Challenges and trends in MEMS wafer level packaging
    Sparks, Doug
    Advancing Microelectronics, 2015, 42 (05): : 14 - 16
  • [47] Wafer-level vacuum packaging for MEMS
    Gooch, R
    Schimert, T
    McCardel, W
    Ritchey, B
    Gilmour, D
    Koziarz, W
    JOURNAL OF VACUUM SCIENCE & TECHNOLOGY A-VACUUM SURFACES AND FILMS, 1999, 17 (04): : 2295 - 2299
  • [48] Wafer level vacuum packaging of MEMS sensors
    Marinis, TF
    Soucy, JW
    Lawrence, JG
    Owens, MM
    55th Electronic Components & Technology Conference, Vols 1 and 2, 2005 Proceedings, 2005, : 1081 - 1088
  • [49] Wafer-level packaging technology for MEMS
    Mirza, AR
    ITHERM 2000: SEVENTH INTERSOCIETY CONFERENCE ON THERMAL AND THERMOMECHANICAL PHENOMENA IN ELECTRONIC SYSTEMS, VOL I, PROCEEDINGS, 2000, : 113 - 119
  • [50] A Low-Temperature SU-8 Based Wafer-Level Hermetic Packaging for MEMS Devices
    Zine-El-Abidine, Imed
    Okoniewski, Michal
    IEEE TRANSACTIONS ON ADVANCED PACKAGING, 2009, 32 (02): : 448 - 452