Steady-state time-domain analysis method with variable time step integration

被引:0
作者
Jokinen, H
Valtonen, M
机构
来源
ICECS 96 - PROCEEDINGS OF THE THIRD IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS, VOLS 1 AND 2 | 1996年
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D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A method for steady-state time-domain analysis with variable time step integration is presented. The algorithm proposed is based on using the changes of the sources as initial data of the analysis and subsequently using the truncation error with optimization. An example is given to demonstrate that the novel method is efficient and sufficiently fast to be used in circuit design. The simulation results show good agreement with those obtained by harmonic balance, steady-state time-domain with a fixed time step integration, and transient analysis.
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页码:1139 / 1142
页数:4
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