Petri net-based modeling and VHDL implementation of digital systems

被引：0

作者：

Wan, Jun ^{[1
]}

机构：

[1] Changzhou Univ, Sch Urban Railway Transportat, Changzhou, Jiangsu, Peoples R China

来源：

PROCEEDINGS OF THE 2016 INTERNATIONAL CONFERENCE ON COMPUTER SCIENCE AND ELECTRONIC TECHNOLOGY | 2016年 / 48卷

关键词：

Petri net; modeling; digital system; VHDL;

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

Petri net-based digital systems modeling and hardware implementation method is well-studied. However, the existing methods are mainly applied to synchronous circuits. In this paper, a new approach is proposed for the modeling and VHDL implementation of digital systems based on an extended class of Petri nets. The generalized synchronous self-modifying net (GSSN) is defined to describe digital systems. Based on a new kind of D flip-flop, known as multi-input & multi-clock D flip-flop, the specific conversion algorithm from Petri nets models to VHDL codes is presented. A design example is given to illustrate the capabilities of the proposed approach. The approach presented in the paper is suitable for both asynchronous systems and synchronous systems.

引用

页码：108 / 111

页数：4

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