High Performance of RSA Simulation System Based on Modified Montgomery Algorithm

被引：0

作者：

Liu, Jingjing ^{[1
]}

Chen, Guanghua ^{[1
]}

Xiao, Zhanpeng ^{[2
]}

Ma, Shiwei ^{[1
]}

Liu, Wanquan ^{[3
]}

Zeng, Weimin ^{[1
]}

机构：

[1] Shanghai Univ, Sch Mech Engn & Automat, Shanghai, Peoples R China

[2] CCDC Drilling & Prod Technol Res Inst, Chengdu, Peoples R China

[3] Curtin Univ, Dept Comp, Perth, WA, Australia

来源：

THEORY, METHODOLOGY, TOOLS AND APPLICATIONS FOR MODELING AND SIMULATION OF COMPLEX SYSTEMS, PT I | 2016年 / 643卷

关键词：

Modular exponentiation algorithm; Right-to-Left scan; RSA simulation system; Montgomery modular multiplication; MULTIPLICATION; ARCHITECTURE;

D O I：

10.1007/978-981-10-2663-8_42

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

In order to eliminate the effect of the factor R-1 and decrease the number of iteration of modular exponentiation algorithm, a high performance scalable of Right-to-Left scan public-key cipher RSA simulation system is proposed. An advanced high radix Montgomery modular multiplication algorithm is presented to calculate by using an adder and a shift register, and the complexity of the circuit is minimized. The computation kernel of the device is two 32 bits multipliers with pipelining architecture, and it operates concurrently. The result of the hardware implementation shows that the improved RSA coprocessor is synthesized by CSMC 0.18um library, the area optimization design of 42 k gates with 213 ms/RSA are obtained to complete a 1024 bits encryption at 10 MHz. Compared with previous works, the proposed architecture can achieve better performance for the chip area and speed.

引用

页码：398 / 408

页数：11

共 17 条

[1]

Aragona R, 2016, LECT NOTES ELECTR EN, V358, P197, DOI 10.1007/978-3-319-23609-4_13

[2] New Attacks on RSA with Modulus N = p2q Using Continued Fractions [J].

Asbullah, M. A. ;

Ariffin, M. R. K. .

3RD INTERNATIONAL CONFERENCE ON SCIENCE & ENGINEERING IN MATHEMATICS, CHEMISTRY AND PHYSICS 2015 (SCITECH 2015), 2015, 622

[3]

Bautista J. N., 2012, COPROCESADOR MATEMTI

[4] Speed Records for Multi-prime RSA Using AVX2 Architectures [J].

Gueron, Shay ;

Krasnov, Vlad .

INFORMATION TECHNOLOGY: NEW GENERATIONS, 2016, 448 :237-245

[5]

Handschuh H, 2000, LECT NOTES COMPUT SC, V1820, P372

[6]

Huang MQ, 2008, LECT NOTES COMPUT SC, V4939, P214, DOI 10.1007/978-3-540-78440-1_13

[7]

Kiss A., 2016, CONSTRUCTIVE SIDE CH

[8] Analyzing and comparing Montgomery multiplication algorithms [J].

Koc, CK ;

Acar, T ;

Kaliski, BS .

IEEE MICRO, 1996, 16 (03) :26-33

[9] Systematic Design of RSA Processors Based on High-Radix Montgomery Multipliers [J].

Miyamoto, Atsushi ;

Homma, Naofumi ;

Aoki, Takafumi ;

Satoh, Akashi .

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2011, 19 (07) :1136-1146

[10]

MONTGOMERY PL, 1985, MATH COMPUT, V44, P519, DOI 10.1090/S0025-5718-1985-0777282-X

← 1 2 →