Mask and wafer cost of ownership (COO) from 65 to 22 nm half-pitch nodes

被引:4
作者
Hughes, Greg [1 ]
Litt, Lloyd C. [1 ]
Wuest, Andrea [1 ]
Palaiyanur, Shyam [1 ]
机构
[1] SEMATECH, Albany, NY 12203 USA
来源
PHOTOMASK AND NEXT-GENERATION LITHOGRAPHY MASK TECHNOLOGY XV, PTS 1 AND 2 | 2008年 / 7028卷
关键词
D O I
10.1117/12.793067
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Anticipating the cost of ownership (COO) of different lithography approaches into the future is an act of faith. It requires that one believe that all of the lithographic problems with next generation lithography (NGL) approaches will be sufficiently resolved to support the production of manufacturing wafers. This paper assumes that all of the necessary technologies will be available in the future and that the cost of the components can be extrapolated from historic cost trends. Mask and wafer costs of a single critical lithography layer for the 65, 45, 32 and 22 nm half-pitch (HP) nodes will be compared for immersion, double process (DP), double expose (DE), extreme ultraviolet (EUV), and imprint technologies. The mask COO analysis assumes that the basic yield of an optical mask is constant from node to node and that the infrastructure that allows this performance will be in place when the technologies are needed. The primary differences in mask costs among lithography approaches are driven by the patterning write time and materials. The wafer COO is driven by the mask cost (for the low wafer-per-mask use case), the lithography tool cost, and the effective wafers per hour (wph) for the lithography approach being considered.
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页数:8
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