Parallel Transient Simulation of Power Delivery Networks using Model Order Reduction

被引:0
作者
Kassis, Marco T. [1 ]
Akaveeti, Yaswanth R. [1 ]
Meyer, Brett H. [1 ]
Khazaka, Roni [1 ]
机构
[1] McGill Univ, Dept Elect & Comp Engn, Montreal, PQ H3A 0E9, Canada
来源
2016 IEEE 25TH CONFERENCE ON ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS (EPEPS) | 2016年
基金
加拿大自然科学与工程研究理事会;
关键词
Power Delivery Networks; Model Order Reduction; Parallel Transient Analysis;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
On-chip power delivery networks have become an important design bottleneck while posing a significant challenge to design automation tools due to their large models. In this paper we propose a method that uses model order reduction methodologies in order to reformulate the simulation as a reduced parallel simulation problem that can take advantage of modern multi-core CPUs. Numerical examples are used to illustrate the accuracy and efficiency of the proposed method.
引用
收藏
页码:211 / 213
页数:3
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