Non-binary Successive Approximation Analog-to-Digital Converters: A Survey

被引:9
作者
Waho, Takao [1 ]
机构
[1] Sophia Univ, Dept Informat & Commun Sci, Chiyoda Ku, Tokyo 1028554, Japan
来源
2014 IEEE 44TH INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC (ISMVL 2014) | 2014年
关键词
LEAKAGE POWER REDUCTION; SAR ADC; A/D; CALIBRATION; DESIGN;
D O I
10.1109/ISMVL.2014.21
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Low-power successive-approximation (SA) analog-to-digital converters (ADCs) are attracting increasing attention these days in biomedical and sensor network applications. The binary search algorithm is one of the basic idea behind how they obtain a binary code representing an analog input. In practice, the imperfectness of analog circuit elements sometimes results in decision errors and decreases the resolution of A/D conversion. Thus, making accurate decisions using imperfect elements is a big challenge. This paper surveys one solution known as non-binary SA with redundancy as well as related topics and its application to state-of-the-art SA ADCs.
引用
收藏
页码:73 / 78
页数:6
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