Silicon interposer with TSVs (through silicon vias) and fine multilayer wiring

In order to achieve high density and high performance package, through silicon vias (TSVs) technology has been desired. Our purpose is the development of silicon interposer which has TSVs and fine multilayer Cu wiring on both side. Since silicon substrate has a quite flat and smooth surface, it can be expected to form fine wiring such as global layer of device. Furthermore, silicon interposer can be expected to show high reliability of bump connection for the reason of the same coefficient of thermal expansion (CTE) with silicon devices. In this paper, elemental technologies such as interconnection of TSV, fabrication of fine wiring, and evaluation of interlayer dielectric are reported. Finally, the application of silicon interposer such as silicon module and inorganic-organic hybrid substrate, are described. As further evolution systems, a substrate with micro channel and substrate less package are proposed.