Implementation of Sense Amplifier in 0.18-μm CMOS Process

L. F. Rahman, M. B. I. Reaz, M. A. M. Ali, M. Marufuzzaman. Implementation of Sense Amplifier in 0.18-mu m CMOS Process // Electronics and Electrical Engineering. - Kaunas: Technologija, 2012. - No. 4(120). - P. 113-116. Sense Amplifier is one of the major circuits in CMOS nonvolatile memories. The aim of this research is to implement Sense Amplifier in 0.18 mu m CMOS process to achieve both the lower reading power and superior reliability for sensing operation. In RFID transponder, EEPROM are used to store data. Memory access time, power dissipation and the reliability of an EEPROM is vigorously influenced by the features of the SA. Current type SA experience the larger current or power dissipation problems, which is not suitable for low voltage applications of RFID transponder. The proposed voltage-type SA is able to execute under a very low power supply voltage (VDD) between IV to 2.6V VDD. The SA circuit implemented within the temperature range from -25 degrees C to 125 degrees C. The compact layout design has been carried out to evaluate the efficiency of the circuit. The modified low voltage-type SA is appropriate for low-voltage applications like RFID EEPROM. Ill. 5, bibl. 10, tabl. I (in English; abstracts in English and Lithuanian).