Enabling gigabit IP for intelligent systems

被引：0

作者：

Tsakiris, Nick ^{[1
]}

Knowles, Greg ^{[1
]}

机构：

[1] Flinders Univ S Australia, Sch Informat & Engn, Adelaide, SA, Australia

来源：

MMACTEE' 08: PROCEEDINGS OF THE 10TH WSEAS INTERNATIONAL CONFERENCE MATHERMATICAL METHODS AND COMPUTATIONAL TECHNIQUES IN ELECTRICAL ENGINEERING: COMPUTATIONAL METHODS AND INTELLIGENT SYSTEMS | 2008年

关键词：

Ethernet; IP; UDP_Lite;

D O I：

暂无

中图分类号：

TP39 [计算机的应用];

学科分类号：

081203 ; 0835 ;

摘要：

In complex, intelligent systems a common requirement is to provide some form of communication between the system and a computer. Whether the purpose is for streaming content, or simply sending, blocks of data between the two machines for processing. This paper provides a solution in the form of an IP based Gigabit Ethernet connection with a specially-designed IP layer implemented directly in hardware to facilitate the connection. The IP core was designed in VHDL and after testing and synthesis, the final results show the interface code to use approximately 1000 slices of FPGA lookup tables, running at just over 125 MHz on a Xilinx Spartan 3 FPGA.

引用

页码：162 / 166

页数：5