Synthesized compact model and experimental results for substrate noise coupling in lightly doped processes

被引：0

作者：

Lan, H ^{[1
]}

Chen, TW ^{[1
]}

Chui, CO ^{[1
]}

Nikaeen, P ^{[1
]}

Kim, JW ^{[1
]}

Dutton, RW ^{[1
]}

机构：

[1] Stanford Univ, Dept Elect Engn, Ctr Integrated Syst, Stanford, CA 94305 USA

来源：

CICC: PROCEEDINGS OF THE IEEE 2005 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2005年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A synthesized compact model of substrate coupling resistance for lightly doped substrate processes is proposed. The model incorporates all geometrical parameters including geometrical mean distance with a few process-dependent fitting coefficients. The model accuracy is shown to be within 15% error using the measurement data from two test chips, one in a customized lightly doped process and the other one in a 0.18-mu m BiCMOS lightly doped process. Substrate noise distribution on a 2 mm by 2 mm chip with 319 substrate contacts is shown with the calibrated SCM model.

引用

页码：469 / 472

页数：4

共 11 条

[1] Impact of technology scaling on substrate noise generation mechanisms
Badaroglu, M
Wambacq, P
Van der Plas, G
Donnay, S
Gielen, G
De Man, H
[J]. PROCEEDINGS OF THE IEEE 2004 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2004, : 501 - 504
[2] Substrate optimization based on semi-analytical techniques
Charbon, E
Gharpurey, R
Meyer, RG
Sangiovanni-Vincentelli, A
[J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1999, 18 (02) : 172 - 190
[3] Grover F.W., 1946, Inductance Calculations: Working Formulas and Tables
[4] A surface potential model for predicting substrate noise coupling in integrated circuits
Kristiansson, S
Ingvarson, F
Kagganti, SP
Jeppson, KO
[J]. PROCEEDINGS OF THE IEEE 2004 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2004, : 497 - 500
[5] LAN H, UNPUB SILENCER SCM E
[6] LAN H, P DES AUT TEST C 200, P836
[7] A comprehensive geometry-dependent macromodel for substrate noise coupling in heavily doped CMOS processes
Ozis, D
Fiez, T
Mayaram, K
[J]. PROCEEDINGS OF THE IEEE 2002 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2002, : 497 - 500
[8] An experimental study on substrate coupling in bipolar/BiCMOS technologies
Pfost, M
Brenner, P
Huttner, T
Romanyuk, A
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2004, 39 (10) : 1755 - 1763
[9] SCHRIK E, 2002, P DES AUT C NEW ORL
[10] Van der Plas G, 2004, ESSDERC 2004: PROCEEDINGS OF THE 34TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE, P361

← 1 2 →