Method for switching noise reduction

被引：2

作者：

Raic, D ^{[1
]}

机构：

[1] Univ Ljubljana, Fac Elect Engn, Microelect Lab, Ljubljana 1000, Slovenia

来源：

ELECTRONICS LETTERS | 1999年 / 35卷 / 21期

关键词：

D O I：

10.1049/el:19991265

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A method is proposed for reducing digital noise in mixed analogue-digital CMOS circuits. The method is based on a distributed clock driver and revere docking technique. It is best suited for circuits where speed can be traded for noise reduction. Reduction factors depend on the circuit design and speed limitations; values in the range 10-50 can be achieved in most cases.

引用

页码：1794 / 1795

页数：2

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