A 60-GHz Outphasing Transmitter in 40-nm CMOS

被引：65
|
作者：
Zhao, Dixian [1 ]
Kulkarni, Shailesh [1 ]
Reynaert, Patrick [1 ]
机构：
[1] Katholieke Univ Leuven, Dept Elect Engn Microelect & Sensors ESAT MICAS, B-3001 Louvain, Belgium
来源：
IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2012年 / 47卷 / 12期
基金：
欧洲研究理事会;
关键词：
CMOS; efficiency; linearization; millimeter-wave; mixer; outphasing transmitter; power amplifier; poly-phase filter; power combiner; 60; GHz; transformer; POWER-AMPLIFIER; TRANSFORMER;
D O I：
10.1109/JSSC.2012.2216692
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents the analysis, design, and implementation of a 60-GHz outphasing transmitter in 40-nm bulk CMOS. The 60-GHz outphasing transmitter is optimized for high output power and peak power-added efficiency (PAE) while maintaining sufficient linearity. The chip occupies an active area of 0.33 mm(2) and consumes 217 mW from a 1-V supply voltage, delivering 15.6-dBm linear output power with 25% PAE (PA). It achieves a 500-Mb/s 16QAM modulation with 12.5-dBm average output power and 15% average efficiency (PA) at an EVM of -22 dB. Mismatch compensation and phase correction are applied to further improve the average output power and efficiency by about 1.6 dB and 4%, respectively.
引用
收藏
页码：3172 / 3183
页数：12
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