Multiple SiGe well: a new channel architecture for improving both NMOS and PMOS performances

被引：15

作者：

Alieu, J ^{[1
]}

Skotnicki, T ^{[1
]}

Josse, E ^{[1
]}

Regolini, JL ^{[1
]}

Bremond, G ^{[1
]}

机构：

[1] CNET, Ctr Commun, ST Microelect, F-38926 Crolles, France

来源：

2000 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS | 2000年

关键词：

D O I：

10.1109/VLSIT.2000.852797

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We present, for the first time, multiple SiGe quantum wells as a new channel architecture allowing increased performances for both NMOS and PMOS short channel transistors. We show that interleaved Si layers are strained as well as SiGe layers which strongly increases both electron and hole mobilities. Comparing multiple well and pure Si epitaxial channel devices, we demonstrate the ability of our structure to better control SCE for both NMOS and PMOS.

引用

页码：130 / 131

页数：2