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- [34] Optimal Thermal Characterization of a Stacked Die Package With TSV Technology 2012 13TH IEEE INTERSOCIETY CONFERENCE ON THERMAL AND THERMOMECHANICAL PHENOMENA IN ELECTRONIC SYSTEMS (ITHERM), 2012, : 130 - 136
- [35] Modeling of Through-Silicon Via's (TSV) with a 3D Planar Integral Equation Solver 2014 INTERNATIONAL CONFERENCE ON NUMERICAL ELECTROMAGNETIC MODELING AND OPTIMIZATION FOR RF, MICROWAVE, AND TERAHERTZ APPLICATIONS (NEMO), 2014,
- [36] Thermal Stresses of TSV and Si Chip in 3D SiP under Device Operation and Reflow Process 2014 INTERNATIONAL CONFERENCE ON ELECTRONICS PACKAGING (ICEP), 2014, : 109 - 112
- [37] Physics-Based Simulation of EM and SM in TSV-Based 3D IC Structures STRESS INDUCED PHENOMENA AND RELIABILITY IN 3D MICROELECTRONICS, 2014, 1601 : 114 - 127
- [38] Copper Through Silicon Via (TSV) for 3D integration 2012 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2012,
- [39] Recent Advances in TSV Inductors for 3D IC Technology 2016 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), 2016, : 29 - 30