A novel three-dimensional dual control-gate with surrounding floating-gate (DC-SF) NAND flash cell

被引：9

作者：

Aritome, Seiichi ^{[1
]}

Whang, SungJin ^{[1
]}

Lee, KiHong ^{[1
]}

Shin, DaeGyu ^{[1
]}

Kim, BeomYong ^{[1
]}

Kim, MinSoo ^{[1
]}

Bin, JinHo ^{[1
]}

Han, JiHye ^{[1
]}

Kim, SungJun ^{[1
]}

Lee, BoMi ^{[1
]}

Jung, YoungKyun ^{[1
]}

Cho, SungYoon ^{[1
]}

Shin, ChangHee ^{[1
]}

Yoo, HyunSeung ^{[1
]}

Choi, SangMoo ^{[1
]}

Hong, Kwon ^{[1
]}

Park, SungKi ^{[1
]}

Hong, SungJoo ^{[1
]}

机构：

[1] SK Hynix, R&D Div, Inchon 467701, Gyeonggi Do, South Korea

来源：

SOLID-STATE ELECTRONICS | 2013年 / 79卷

关键词：

3D; Floating gate; NAND; Flash memory; ULTRA-HIGH DENSITY;

D O I：

10.1016/j.sse.2012.07.005

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A novel three-dimensional (3D) Dual Control gate with Surrounding Floating gate (DC-SF) NAND flash cell has been successfully developed. The DC-SF cell consists of a surrounding floating gate with stacked dual control gates. With this structure, high coupling ratio, low voltage cell operation, and wide P/E window (9.2 V) can be obtained. Moreover, negligible FG-FG coupling interference (12 mV/V) is achieved due to the control-gate shield effect. As a result, DC-SF NAND flash cell can overcome the problems of SONOS-based 3D NAND flash. It is proposed that 3D DC-SF NAND flash cell is the most promising candidate for 1 Tb and beyond, with stacked multi bit FG cell (2-4 bits/cell). (C) 2012 Elsevier Ltd. All rights reserved.

引用

页码：166 / 171

页数：6