Improving the Energy/Power Constraint for Technology Optimization

被引:0
|
作者
Frank, D. J. [1 ]
Chang, L. [1 ]
Haensch, W. [1 ]
机构
[1] IBM TJ Watson Res Ctr, Yorktown Hts, NY 10598 USA
来源
2011 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) | 2011年
关键词
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暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Consideration of energy and power constraints is critical in establishing roadmap projections for future generations of CMOS technology. We introduce a new optimization constraint, energy x power density, which better reflects actual design goals and compromises, and use it to evaluate technology scaling trends. We highlight differences from conventional expectations about scaling, including the need for separate targets for high-performance parallel designs versus single-thread designs, and include an evaluation of the prospects for low- temperature operation.
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页数:4
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