Multi-die Integration Using Advanced Packaging Technologies

被引：19

作者：

Lee, Hyung-Jin ^{[1
]}

Mahajan, Ravi ^{[2
]}

Sheikh, Farhana ^{[3
,4
]}

Nagisetty, Ramune ^{[1
]}

Deo, Manish ^{[3
,4
]}

机构：

[1] Intel Corp, Technol Dev, Hillsboro, OR 97124 USA

[2] Intel Corp, Assembly & Test Technol Dev, Chandler, AZ 85226 USA

[3] Intel Corp, Programmable Solut Grp, Hillsboro, OR USA

[4] Intel Corp, Programmable Solut Grp, San Jose, CA USA

来源：

2020 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC) | 2020年

关键词：

D O I：

10.1109/cicc48029.2020.9075901

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a review of 2-D and 3-D multi-die integration technologies and focuses on on-package multi-die co-integration to create new types of system platforms. These dice may or may not be implemented in the same technology process. The paper first presents the challenges of process scaling and coexistence of logic, IO, and RF, and discusses new system/platform requirements from emerging applications. Following the motivation, a review of multi-die integration technologies with a focus on-package 2-D and 3-D multi-die integration and process enhancements for its support is provided. Finally, we present three new multi-die platforms which embody recent innovations in system platform integration to create new FPGA and CPU architectures which can be used to efficiently implement AI, HPC, and machine learning algorithms.

引用

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