Heterogeneous Multi-Core System, synchronized by a Petri Processor on FPGA

被引：2
|
作者：
Pereyra, M. [1 ]
Gallia, N. [1 ]
Alasia, M. [1 ]
Micolini, O. [1 ]
机构：
[1] Univ Nacl Cordoba, FCEFyN, RA-5000 Cordoba, Argentina
来源：
IEEE LATIN AMERICA TRANSACTIONS | 2013年 / 11卷 / 01期
关键词：
FPGA; IPCore; Microblaze; MultiCore; Petri Net; Synchronization; SoftCore;
D O I：
10.1109/TLA.2013.6502806
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
This report describes the development of a hardware mechanism to improve synchronization in a multicore architecture, using Petri's formalisms. A module that interfaces with two Microblaze processors is developed. Then it is implemented in a FPGA, thus constituting an heterogeneous multicore system with synchronization capability by hardware.
引用
收藏
页码：218 / 223
页数：6
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