Fast and Accurate Fractional Frequency Synthesizer in 0.18μm Technology

被引:0
|
作者
Ghasemzadeh, Mehdi [1 ]
Soltani, Arefeh [2 ]
Akbari, Amin [1 ]
Hadidi, Khayrollah [1 ]
机构
[1] Urmia Univ, Microelect Res Lab, Orumiyeh, Iran
[2] Urmia Grad Inst, Orumiyeh, Iran
来源
2015 22ND INTERNATIONAL CONFERENCE MIXED DESIGN OF INTEGRATED CIRCUITS & SYSTEMS (MIXDES) | 2015年
关键词
5-bit control signal; frequency synthesizer; Ring oscillator; CLOCK-GENERATOR; HIGH-SPEED;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
A 900MHz frequency synthesizer is presented in this article. The purpose of the proposed architecture is to minimize lock time in Phase-Locked Loops (PLLs). The structure has been simulated by HSPICE software in a typical 0.18um CMOS technology at the supply voltage of 1.8V. Simulation results prove that the designed frequency divider locks instantly that is a lower lock time compared to conventional PLLs.
引用
收藏
页码:330 / 333
页数:4
相关论文
共 50 条
  • [41] A fractional frequency synthesizer based on ADPLL
    Tsai, CC
    Wu, HH
    Lee, WT
    2003 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS, AND APPLICATIONS, PROCEEDINGS OF TECHNICAL PAPERS, 2003, : 151 - 154
  • [42] A 0.13μm CMOS Δ ∑ fractional-N frequency synthesizer for WLAN transceivers
    楚晓杰
    贾海珑
    林敏
    石寅
    代伐
    半导体学报, 2011, 32 (10) : 113 - 119
  • [43] An Accurate and Fast Behavioral Model for PLL Frequency Synthesizer Phase Noise/Spurs Prediction
    Yan, Xiaozhou
    Kuang, Xiaofei
    Wu, Nanjian
    PROCEEDINGS OF THE IEEE 2009 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2009, : 223 - 226
  • [44] A 9-bit quadrature direct digital synthesizer implemented in 0.18-μm SiGeBiCMOS technology
    Yu, Xuefeng
    Dai, Fa Foster
    Irwin, J. David
    Jaeger, Richard C.
    IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2008, 56 (05) : 1257 - 1266
  • [45] A Design of the Frequency Synthesizer for DRM/DAB/AM/FM Application in 0.18 μm RF CMOS Process
    Lei Xuemei
    Wang Zhigong
    Wang Keping
    2011 INTERNATIONAL CONFERENCE OF ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2011,
  • [46] A 12 GHz 1.9 W direct digital synthesizer MMIC implemented in 0.18 μm SiGeBiCMOS technology
    Yu, Xuefeng
    Dai, Fa Foster
    Irwin, J. David
    Jaeger, Richard C.
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2008, 43 (06) : 1384 - 1393
  • [47] Fast-locking integer/fractional-N hybrid PLL frequency synthesizer
    Woo, Kyoungho
    Ham, Donhee
    IEEE MWSCAS'06: PROCEEDINGS OF THE 2006 49TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS,, 2006, : 674 - +
  • [48] A 27GHz Frequency Divider in 0.18μm CMOS Technology
    Sun, Xiaolin
    Guo, Ting
    2014 2ND INTERNATIONAL CONFERENCE ON ECONOMIC, BUSINESS MANAGEMENT AND EDUCATION INNOVATION (EBMEI 2014), VOL 39, 2014, 39 : 15 - 21
  • [49] Effects of electrical stress on the frequency performance of 0.18 μm technology NMOSFETs
    Naseh, S
    Deen, MJ
    Marinov, O
    ICMTS 2001: PROCEEDINGS OF THE 2001 INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES, 2001, : 119 - 123
  • [50] A fractional frequency synthesizer using frequency locked loop
    Rejeesh, A., V
    Mandal, Pradip
    2007 14TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-4, 2007, : 1392 - 1395